منابع مشابه
Power Conscious BIST Approaches
The System-On-Chip (SOC) revolution has brought some new challenges to both design and test engineers. The most important challenges of today’s VLSI systems testing are linked to test cost, defect coverage and power dissipation. Implementing a self-testable system may reduce test costs as expensive external high performance test equipment is not required and it may increase defect coverage as t...
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1 This work was supported by DFG grant WU 245/1-3 Abstract Power consumption of digital systems may increase significantly during testing. In this paper, systems equipped with a scan-based built-in self-test like the STUMPS architecture are analyzed, the modules and modes with the highest power consumption are identified, and design modifications to reduce power consumption are proposed. The de...
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ژورنال
عنوان ژورنال: IEICE Electronics Express
سال: 2013
ISSN: 1349-2543
DOI: 10.1587/elex.10.20130469